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PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
LVDS High-Speed Differential Line Receivers
Features
* Signaling Rates >400Mbps (200 MHz) * Single 3.3V Power Supply Design * Accepts 350mV (typical) Differential Swing * Maximum Differential Skew of 0.35ns * Integrated 110-Ohm termination on PI90LVTxxxx * Maximum Propagation Delay of 4.7ns * Low Voltage TTL (LVTTL) Outputs * Industrial Temperature Operating Range: -40C to 85C * Open, Short, and Terminated Fail Safe * Meets or Exceeds ANSI/TIA/EIA-644 LVDS Standard * Packaging (Pb-free & Green available): -16-Pin TSSOP (L ) -16-Pin SOIC (W) -8-Pin SOIC (W) -8-Pin MSOP (U)
Description
The PI90LV/LVT3486 and PI90LV/LVT9637 are differential line receivers that use low-voltage differential signaling (LVDS) to support data rates in excess of 400 Mbps. These products are designed for applications requiring high-speed, low-power consumption and low noise generation. A differential input signal (350mV) is translated by the device to 3V CMOS output level.
Applications
Applications include point-to-point and multidrop baseband data transmission over controlled impedance media of approximately 100-ohms. The transmission media can be printed circuit board traces, backplanes, or cables. The PI90LV/LVT3486 and PI90LV/LVT9637, as well as companion line drivers PI90LV/LVB3487 and PI90LV/LVB9638 provide new alternatives to RS-232, PECL, and ECL devices for high-speed, point-to-point interface applications.
PI90LV/LVT3486
16-Pin W, L
PI90LV/LVT9637
8-Pin W,U
1
PS8667A
10/04/04
Note: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers
Absolute Maximum Ratings (see Note 1, Page 4)
Supply Voltage (VCC) ....................................... -0.3V to +4.0V Input Voltage (RIN+, RIN-) ............................... -0.3V to +3.9V Enable Input Voltage (EN) ...................... -0.3V to (VCC +0.3V) Output Voltage (ROUT) .......................... -0.3V to (VCC +0.3V) S Package .................................................................... 750mW Derate S Package ................................8.2mW/C above +25C Storage Temperature Range .......................... -65C to +150C Lead Temperature Range Soldering (4s) ...................... +260C Maximum Junction Temperature .................................. +150C ESD Rating ................................................................... 10kV
Function Tables PI90LV/LVT3486
Enable EN H H H L H Diffe re ntial Inputs RIN+, RIN- VID 100mV -100mV < VID < 100mV VID -100mV X Open Output ROUT H ? L Z H
PI90LV/LVT9637
Diffe re ntial Inputs RIN+, RIN- VID 100mV -100mV < VID < 100mV VID -100mV Open Output ROUT H ? L H
Recommended Operating Conditions
M in. Supply Voltage (VCC) Receiver Input Voltage Operating Free Air Temperature (TA) +3.0 GND -40 +25 Typ. +3.3 M ax. +3.6 +3.0 +85 Units V
Pin Descriptions
C
Name ROUT RIN+ RIN- GND VCC
De s cription TTL/CMOS receiver output pins Non- inverting receiver input pins Inverting receiver input pins Ground pin Positive power supply pin, +3.3V 10%
2
PS8667A
10/04/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers
Electrical Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (Note 2)
Symbol VTH VTL VCMR IIN
Parame te r Differential Input High Threshold Differential Input Low Threshold Common- Mode Voltage Range Input Current
Conditions
Pin
M in.
Typ. +20
M ax. +100
Units mV
Vcm = +1.2V
(12)
-100 VID = 200mV peak- to- peak(5) VIN = +2.8V VIN = 0V VIN = +3.6V RIN+, RIN0.1 -10 -10 -20 2.7 2.7 ROUT 2.7
-20 2.6 1 1 +10 +10 +20 3.0 3.0 3.0 0.1 0.25 -120 +10 VCC 0.8 1 -0 . 8 10 15 15 10 10 143 pF mA +20 mA A V A V V A V
VCC = +3.6 or 0V VCC = 0V
VOH
Output High Voltage
IOH = -0.4mA, VID = +200mV IOH = -0.4mA, Input terminated IOH = -0.4mA, Input shorted
VOL IOS IOZ VIH VIL II VCL ICC
Output Low Voltage Output Short Circuit Current Output Three- State Current Input High Voltage Input Low Voltage Input Current Input Clamp Voltage No Load Supply Current Receivers Enabled No Load Supply Current Receivers Disabled Input Capacitance Termination Impedance
IOL = 2mA, VID = -200mV Enabled, Vout = 0V(10) Disabled, VOUT = 0V or VCC
-15 -10 2.0
-48 1
VIN = 0V or VCC, Other Input = VCC or GND ICL = -18mA EN = VCC or GND, Inputs Open EN = 2.4V or 0.5V, Inputs Open EN = GND, Inputs Open
EN
GND -20 -1.5
VCC
10 7 5
ICCZ CW RTERM
PI90LVTxxxx
90
110
3
PS8667A
10/04/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers
Switching Characteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (Notes 3,4,7,8)
Symbol tPHLD tPLHD tSKD1 tSKD2 tSKD3 tSKD4 tTLH tTHL tPHZ tPLZ tPZH tPZL fMAX
Parame te r Differential Propagation Delay High to Low (VCM = 1.23V) Differential Propagation Delay Low to High (VCM = 1.23V) Differential Pulse Skew | tPHLD - tPLHD | Differential Part- to- Part Skew Rise Time Fall Time Disable Time High to Z Disable Time Low to Z Enable Time Z to High Enable Time Z to Low Maximum Operating Frequency(13)
(8) (6)
Conditions
M in. 1.8 1.8 0
Typ.
M a x. 4.7 4.7
Units
0.1 0.1
0.5 0.5 1.0 1.5
Differential Channel- to- Channel Skew- same device(7) Differential Part- to- Part Skew(9)
C L = 10 p F VID = 200mV (Figures 1 & 2)
0
0.35 0.35 RL = 2k C L = 10 p F (Figures 3 & 4) All channels switching 8 6 11 11 250
1.2 1.2 12 12 17 17
ns
MHz
Notes: 1. "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of "Electrical Characteristics" specifies conditions of device operation. 2. Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground unless otherwise specified. 3. All typicals are given for: VCC = +3.3V, TA = +25C. 4. Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50, tR and tF (0% to 100%) 3ns for RIN. 5. The VCMR range is reduced for larger VID. Example : if VID = 400mV, the VCMR is 0.2V to 2.2V. The fail-safe condition with inputs shorted is valid over a common-mode range of 0V to 2.3V. A VID up tp VCC - 0V may be applied to the RIN+ / RIN- inputs with the Common-Mode voltage set to VCC/2. Propagation delay and Differential Pulse skew decrease when VID is increased from 200mV to 400mV. Skew specifications apply for 200mV VID 800mV over the common mode range. 6. tskd1 is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. 7. tSKD2, Channel-to-Channel Skew, is defined as the difference between the propagation delay of one channel and that of the others on the same chip with any event on the inputs. 8. tSKD3, Part-to-Part Skew, is the differential Channel-to-Channel skew of any event between devices. This specification applies to devices at the same VCC,and within 5C of each other within the operating temperature range. 9. tSKD4, Part-to-Part Skew, is the differential Channel-to-Channel skew of any event between devices. This specification applies to devices over recommended operating temperature and voltage ranges, and across process distribution. tskd4 is defined as IMax - Mini differential propagation delay. 10. Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at a time, do not exceed maximum junction temperature specification. 11. CL includes probe and jig capacitance. 12. VCC is always higher than RIN+ and RIN- voltage. RIN- and RIN+ are allowed to have a voltage range -0.2V to VCC- VID/2. However, to be compliant with AC specifications, the common voltage range 0.1V to 2.3V. 13. fmax generator input conditions: tR = tF < 1ns, (0% to 100%), 50% duty cycle, differential (1.05V to1.35V peak to peak). Output Criteria: duty cycle = 60%/40%, VOL (max 0.4V), VOH (min 2.7V), Load = 10pF (stray plus probes).
4
PS8667A
10/04/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers
Parameter Measurement Information
RIN+ Generator RIN- R CL 50 50 ROUT
Receiver Enabled
Figure 1. Receiver Propagation Delay and Transition Time Test Circuit
RIN0V (Differential) RIN+ tPLHD 80% ROUT 20% tTLH tTHL 1.5V tPHLD 80% 1.5V 20% VID = 200mV +1.2V
+1.3V +1.1V
VOL
Figure 2. Receiver Propagation Delay and Transition Time Waveforms
CL includes load and test jig capacitance. S1 = VCC for TPZL, and TPLZ measurements S1= GND for tPZH and tPHZ measurements
VCC
S1
RL EN Generator 50 RIN+ RIN- Device Under Test CL ROUT
Figure 3. Receiver Three-State Delay Test Circuit
5
PS8667A
10/04/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers
EN When EN* = VCC 1.5V 1.5V
3V 0V 3V 1.5V 1.5V 0V tPLZ tPZL VCC 0.5V tPHZ 0.5V 50% tPZH 50% GND VOL VOH
EN* When EN = GND
Output When VID = -100mV Output When VID = +100mV
Figure 4. Receiver Three-State Delay Waveforms
Enable Data Input
Balanced System 1/4 PI90LV3486 + Data - Output
RT
100
ANY LVDS DRIVER
Figure 5. Point-to-Point Application
6
PS8667A
10/04/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers
Packaging Mechanical: 16-Pin MSOP (U)
15 Max. .003 .012 0.07 0.30 .003 .012 0.07 0.30
Gauge Plane .010 0.25 .016 .028 0.40 0.70 Detail A
15 Max. .037 0.95 REF
0- 6
.112 2.85 .120 3.05 15 MAX .114 2.90 .122 3.10
Detail A
15 MAX .114 2.90 .122 3.10
Packaging Mechanical: 8-Pin SOIC (W)
8
.149 .157
3.78 3.99
.0099 .0196
0.25 x 45 0.50
1 .189 .196 .016 .026 0.406 0.660 REF 4.80 5.00 1.35 1.75 SEATING PLANE
0-8
.0075 .0098 0.40 .016 1.27 .050
0.19 0.25
.053 .068
.2284 .2440 5.80 6.20
.050 BSC 1.27 .013 0.330 .020 0.508
.0040 0.10 .0098 0.25 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS
7
PS8667A
10/04/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers
Packaging Mechanical: 16-Pin TSSOP (L)
16
.169 .177
4.3 4.5
1 .193 .201 4.9 5.1 .004 .008 .047 max. 1.20 SEATING PLANE 0.45 .018 0.75 .030 .252 BSC 6.4
0.09 0.20
.0256 BSC 0.65
.007 .012 0.19 0.30
.002 .006
0.05 0.15 X.XX DENOTES CONTROLLING X.XX DIMENSIONS IN MILLIMETERS
Packaging Mechanical: 16-Pin SOIC (W)
16
.149 .157
3.78 3.99 .0099 .0196 0.25 x 45 0.50
1 .386 .393 9.80 10.00 .0155 .0260 0.393 0.660 REF .053 .068 1.35 1.75 SEATING PLANE 0-8 0.41 1.27 .016 .050 .0075 .0098 0.19 0.25
.2284 .2440 5.80 6.20
.050 BSC 1.27
.013 .020 0.330 0.508
.0040 0.10 .0098 0.25
X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS
8
PS8667A
10/04/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI90LV3486/PI90LVT3486 PI90LV9637/PI90LVT9637 LVDS High-Speed Differential Line Receivers
Ordering Information
Ordering Code PI90LV3486L PI90LV3486LE PI90LV3486W PI90LV3486WE PI90LVT3486L PI90LVT3486LE PI90LVT3486W PI90LVT3486WE PI90LV9637U PI90LV9637UE PI90LV9637W PI90LV9637WE PI90LVT9637U PI90LVT9637UE PI90LVT9637W PI90LVT9637WE Package Code L L W W L L W W U U W W U U W W Package Type 16-pin TSSOP Pb-free & Green, 16-pin TSSOP 16-pin SOIC Pb-free & Green, 16-pin SOIC 16-pin TSSOP Pb-free & Green, 16-pin TSSOP 16-pin SOIC Pb-free & Green, 16-pin SOIC 8-pin MSOP Pb-free & Green, 8-pin MSOP 8-pin SOIC Pb-free & Green, 8-pin SOIC 8-pin MSOP Pb-free & Green, 8-pin MSOP 8-pin SOIC Pb-free & Green, 8-pin SOIC
Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
Pericom Semiconductor Corporation * 1-800-435-2336 * www.pericom.com
9
PS8667A 10/04/04

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